A delta-sigma (ΔΣ) modulator has a circuit configuration which performs feedback of quantization noise generated in an output to an input via a delayer and sometimes is called “sigma-delta (ΣΔ) modulator” or “noise shaper” because of its function of biasing quantization noise to the high frequency band.
When a frequency synthesizer including a phase locked loop (PLL) is used for a radio communication device such as a cellular phone, in order to ensure many available bands, it is required to change an output frequency with a smaller step size than the frequency of a reference signal. As a frequency synthesizer to meet this requirement, a ΔΣ modulation fractional frequency division PLL frequency synthesizer has been known. An exemplary ΔΣ modulation fractional frequency division PLL frequency synthesizer is described in U.S. Pat. No. 5,070,310. In the PLL frequency synthesizer, a fractional frequency divider for frequency-dividing an output of a voltage control oscillator to feedback the output to a phase comparator includes a ΔΣ modulator and a digital value F representing fraction part (non-integer part) of frequency division data is given to the ΔΣ modulator.
Moreover, a high accuracy digital/analog (D/A) converter including a ΔΣ modulator, i.e., a ΔΣ modulation D/A converter is used for an audio device and the like.